Communication between devices within a computer system is typically performed using one or more busses to interconnect the devices. These busses may be dedicated busses coupling to devices or non-dedicated busses that are multiplexed by a number of units and devices (e.g., bus agents). Moreover, busses within a computer system may be dedicated to transferring a specific type of information. For example, many microprocessor architectures include a three-bus system comprised of address, data and control busses for respectively transferring data, address and control signals.
A vast amount of research in architecture design is directed to increasing data throughput within computer systems. During the past decade, peripheral component interconnect (PCI) has provided a very successful general purpose input/output (I/O) interconnection standard. PCI is a general purpose I/O interconnect standard that utilizes PCI signaling technology, including a multi-drop parallel bus implementation. Unfortunately, the decade of time since the introduction of PCI has resulted in the identification of the various shortcomings of PCI, such as the relatively low clock speed, the use of delayed transactions, wait states and other deficiencies that resulted in poor performance. As a result, system architects have devised PCI-X to target deficiencies in the PCI bus protocol. Unfortunately, PCI-X retains many of the deficiencies attributed to the PCI bus protocol.